New SA65 CSAC provides wider operating temperatures, faster warm-up and improved frequency stability in extreme environments
Photo: Microchip Technology
Microchip Technology Inc. is offering the new SA65 chip-scale atomic clock (CSAC), providing precise timing accuracy and stability in extreme environments. Designed for military and industrial systems, the Microchip’s SA65 CSAC features ultra-high precision and low power consumption
Advanced military platforms, ocean-bottom survey systems and remote-sensing applications all require precise timing. CSACs ensure stable and accurate timing even when GNSS time signals are unavailable, thereby helping industrial and military system designers to meet timing requirements.
Microchip’s SA65 CSAC is an embedded timing solution with improved environmental ruggedness, delivering higher performance than the previous SA.45s CSAC, including double the frequency stability over a wider temperature range and faster warm-up from cold temperatures. The SA65 has an operating temperature range of –40 to 80 °C and a storage temperature range of –55 to 105 °C. The warm-up time of two minutes at –40 °C is 33% faster than that of the SA.45s.
These performance improvements benefit designers of highly portable solutions for military applications such as assured positioning, navigation and timing (A-PNT) and C5ISR (command, control, communications, computers, cyber, intelligence, surveillance and reconnaissance). It meets precise frequency requirements of a low size, weight and power (SWaP) atomic clock. Improvements such as fast warm-up to frequency after cold start, temperature stability over a wide operating range, and frequency accuracy and stability enabling extended operation while GNSS is denied help to ensure mission success in conflict environments.
The SA65 CSAC provides precise timing for portable and battery-powered applications requiring continuous operation and holdover in GNSS-denied environments. The SA65 is form-, fit- and function-compatible with the SA.45s, which minimizes risk and redesign costs for the system developer while improving performance and environmental insensitivity.